Bus-based computer systems can be created by using good choice of microprocessors, input/output devices and appropriate memory components. CPU bus is a set up used for the interconnection of these constituent components. Thus through bus, CPU communicates with memory and input/output devices. A bus is a collection of wires and defined by a protocol. This protocol allows smooth communication between CPU and memory/input/output devices. Bus provides an effective and excellent interface to memory. The basic building block of bus protocol is four-cycle handshake. This block ensures that when two devices want to communicate, one is ready to transmit and the other is ready to receive. Here two wires are used for this purpose. These wires are named as ‘enq’ meaning enquiry and ‘ack’ meaning acknowledge. Some additional wires are also used during data transmission. In the first cycle, the first device raises its output to signal an enquiry. This makes second device ready for reception of data. In the second cycle, second device raises its output to signal acknowledgement. Now both the devices are ready for transmission and reception. In the third cycle, second device lowers its output and signals the complete reception of data. In the fourth and last cycle, first device lowers its output.
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